Is on-chip differential termination always enabled when using the UIB_PLL_REF_CLK pins in Stratix® 10 MX devices? - Is on-chip differential termination always enabled when using the UIB_PLL_REF_CLK pins in Stratix® 10 MX devices? Description Yes, when using the UIB_PLL_REF_CLK pins in Stratix® 10 MX devices, on-chip differential termination will always be enabled and cannot be disabled. Resolution This information will be added to Stratix® 10 documentation in the future. Custom Fields values: ['novalue'] Troubleshooting 18017923458 False ['novalue'] ['novalue'] novalue novalue ['Stratix® 10 MX FPGA'] ['novalue'] ['novalue'] ['novalue']