Why does the DisplayPort FPGA IP TX-only Design Example fail to work at 8kp30 resolution in the Quartus® Prime Pro Edition Software version 23.4? - Why does the DisplayPort FPGA IP TX-only Design Example fail to work at 8kp30 resolution in the Quartus® Prime Pro Edition Software version 23.4?
Description Due to a problem in the DisplayPort FPGA IP core in the Quartus® Prime Pro Edition Software v23.4 and earlier, the video output will be incorrect when using the DisplayPort FPGA IP TX-only Design Example running at the 8kp30 resolution. Resolution This problem has been fixed starting in version 24.1 of the Quartus® Prime Pro Edition Software.
Custom Fields values:
['novalue']
Troubleshooting
15015121898
False
['DisplayPort']
['FPGA Dev Tools Quartus® Prime Software Pro']
24.1
23.4
['Agilex™ FPGA Portfolio', 'Arria® 10 FPGAs and SoCs', 'Stratix® 10 FPGAs and SoCs']
['novalue']
['novalue']
['novalue'] - 2024-03-19
external_document
- Resource Type
- Support Resources > Knowledge Articles
- Source Name
- khoros