Why does the c5gt_pro_goldentop.v file in the Cyclone® V GT installation kit include ground connections for the hard memory controller? - Why does the c5gt_pro_goldentop.v file in the Cyclone® V GT installation kit include ground connections for the hard memory controller? Description You may see a discrepancy between the following two files in the Cyclone® V GT installation kit: - c5gt_pro_goldentop.v - c5gt_ddr3.v Inside the c5gt_pro_goldentop.v file, you will see a 17-bit bus ddr3a_hmc_gnd for the required ground pins in the hard memory controller. The c5gt_ddr3.v file does not include this bus. These ground pins are automatically added to the pin file during compilation by the Quartus® II software and are not needed in the RTL. Resolution The ddr3a_hmc_gnd output bus can be safely removed from the c5gt_pro_goldentop.v file . Custom Fields values: ['novalue'] Troubleshooting NA False ['DDR3 SDRAM Controller with UniPHY IP'] ['FPGA Dev Tools Quartus II Software'] novalue 13.1.4 ['Cyclone® V GT FPGA'] ['novalue'] ['novalue'] ['novalue']