Why do I get a compilation error when my design partition contains an Intel® Arria®10 Transceiver? - Why do I get a compilation error when my design partition contains an Intel® Arria®10 Transceiver? Description In the Intel® Quartus® Prime Standard Edition Software, you may see an error when your design partition contains an Intel® Arria® 10 Transceiver PHY and/or Transceiver PLL. Resolution The Quartus® Prime Standard Edition Software does not support partitions for Arria® 10 Transceiver PHY and/or Transceiver PLL. Exclude the Arria® 10 Transceiver PHY or Transceiver PLL from the design block before creating the partition. Custom Fields values: ['novalue'] Troubleshooting FB: 464962; False ['Transceiver ATX PLL Arria® 10 Cyclone® 10 FPGA IP', 'Transceiver CMU PLL Arria® 10 Cyclone® 10 FPGA IP', 'Transceiver Native PHY Arria® 10 Cyclone® 10 FPGA IP', 'fPLL Arria® 10 Cyclone® 10 FPGA IP'] ['FPGA Dev Tools Quartus® Prime Software Standard'] novalue 14.0a10 ['Arria® 10 FPGAs and SoCs'] ['novalue'] ['novalue'] ['novalue']