Can I use the SOF file generated from the implementation revision to perform the initial full chip configuration in a Partial Reconfiguration design? - Can I use the SOF file generated from the implementation revision to perform the initial full chip configuration in a Partial Reconfiguration design? Description Yes, you can use any of the base or implementation compiled SOFs for the initial full chip configuration. Resolution All of the PR persona RBFs will be compatible with either the base SOF or any implementation SOF, as long as they are compiled with the same version of the Intel® Quartus® Prime Pro Edition Software and the same static QDB file. Custom Fields values: ['novalue'] Troubleshooting 15011226661 False ['novalue'] ['FPGA Dev Tools Quartus® Prime Software Pro'] novalue 21.4 ['Agilex™ 7 FPGAs and SoCs', 'Arria® 10 FPGAs and SoCs', 'Cyclone® 10 GX FPGA', 'Stratix® 10 FPGAs and SoCs'] ['novalue'] ['novalue'] ['novalue']