Why an interrupt of the character timeout on Intel® FPGA 16550 Compatible UART Core is de-asserted without reading the receiver FIFO? - Why an interrupt of the character timeout on Intel® FPGA 16550 Compatible UART Core is de-asserted without reading the receiver FIFO? Description Due to a problem in the Intel® Quartus® Prime Standard Edition Software version 20.1 or earlier, and the Intel® Quartus® Prime Pro Edition Software versions, you might see that an interrupt of the character timeout on Intel® FPGA 16550 Compatible UART Core is de-asserted without reading the receiver FIFO. As a result, an interrupt handler of the Nios® II processor would hang. Resolution This problem is fixed beginning with the Intel® Quartus® Prime Standard Edition Software version 21.1 and is scheduled to be fixed in a future release of the Intel® Quartus® Prime Pro Edition Software. Custom Fields values: ['novalue'] Troubleshooting 14013799700 False ['16550 Compatible UART IP'] ['FPGA Dev Tools Quartus® Prime Software'] 21.1 18.1.1 ['Programmable Logic Devices'] ['novalue'] ['novalue'] ['novalue']