Why do rx_st_err signal continues to drive an unknown value ('X') during Stratix V PCIe core simulation? - Why do rx_st_err signal continues to drive an unknown value ('X') during Stratix V PCIe core simulation? Description Due to a bug in the Stratix V PCIe Hard IP core the rx_st_err signal is incorrectly assigned in the file "altpcie_sv_hip_ast_hwtcl.v". Resolution To workaround this issue open the file "altpcie_sv_hip_ast_hwtcl.v" then find and change the following line: From: assign rx_st_err = |rx_st_err_int[3:0]; To: assign rx_st_err = rx_st_err_int[0]; This issue will be fixed in a future version of the Quartus® II software release. Custom Fields values: ['novalue'] Troubleshooting novalue False ['Simulation'] ['FPGA Dev Tools Quartus II Software'] novalue 11.1 ['Stratix® V FPGAs', 'Stratix® V GX FPGA'] ['novalue'] ['novalue'] ['novalue']