Why does the "rx_10g_frame_mfrm_err" flag assert during an Interlaken non-framing layer control word when using a Stratix V device Native PHY IP with the Interlaken Preset? - Why does the "rx_10g_frame_mfrm_err" flag assert during an Interlaken non-framing layer control word when using a Stratix V device Native PHY IP with the Interlaken Preset? Description Due to a problem in the Quartus® Prime software, both the "rx_10g_mfrm_err" flag and "rx_10g_control[8]" status bit might assert during Interlaken non-framing layer control words when using the Stratix V device Native PHY IP with the Interlaken Preset. Resolution To workaround this issue, ignore the "rx_10g_mfrm_err" flag and "rx_10g_control[8]" status bit during non-framing layer control word locations within the Interlaken metaframe. Custom Fields values: ['novalue'] Troubleshooting FB: 438288; False ['novalue'] ['FPGA Dev Tools Quartus® Prime Software Pro'] novalue 15.1 ['Stratix® V GS FPGA', 'Stratix® V GT FPGA', 'Stratix® V GX FPGA'] ['novalue'] ['novalue'] ['novalue'] - 2021-08-25

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