Why does the F-Tile Ethernet FPGA Hard IP with PTP enabled and FHT PMA type fail to assert o_rx_pcs_ready on hardware? - Why does the F-Tile Ethernet FPGA Hard IP with PTP enabled and FHT PMA type fail to assert o_rx_pcs_ready on hardware? Description Due to a problem in the Quartus® Prime Pro Edition Software v21.4, the F-Tile Ethernet FPGA Hard IP with FHT PMA type fails to output o_clk_rec_div (RX recovered clock) on hardware. As the o_clk_rec_div clock is required for Advanced Timestamp Accuracy Mode, the IP cannot establish a link, and o_rx_pcs_ready will not be asserted. Resolution To work around this problem in the Quartus® Prime Pro Edition Software v21.4, select Basic Timestamp Accuracy Mode where the o_clk_rec_div clock is not required Additional Information This problem is fixed starting with the Quartus® Prime Pro Edition Software version 22.1. Custom Fields values: ['novalue'] Errata 15010336772 False ['IP Ethernet IEEE 1588 Timestamping IP-ETH-1588'] ['FPGA Dev Tools Quartus® Prime Software Pro'] 22.1 21.4 ['Agilex™ 7 FPGA I-Series'] ['novalue'] ['novalue'] ['novalue']