Why are there incorrect Precision Time Protocol (PTP) latency measurement values when using the Intel® Stratix® 10 E-Tile Hard IP for Ethernet Intel FPGA IP. - Why are there incorrect Precision Time Protocol (PTP) latency measurement values when using the Intel® Stratix® 10 E-Tile Hard IP for Ethernet Intel FPGA IP. Description Due to a problem in the Intel® Quartus® Prime Pro Edition Software version 21.3 and later you may encounter incorrect Precision Time Protocol (PTP) latency measurement values when using the Intel® Stratix® 10 E-Tile Hard IP for Ethernet Intel FPGA IP. Resolution A patch is available to fix this problem for the Intel® Quartus® Prime Pro Edition Software version 21.3. Download and install patch 0.34 from the following links: Intel® Quartus® Prime Pro Edition Software v21.3 Patch 0.34 for Linux (.run) Intel® Quartus® Prime Pro Edition Software v21.3 Patch 0.34 for windows (.exe) Readme for Intel® Quartus® Prime Pro Edition Software v21.3 Patch 0.34 (.txt) This problem is scheduled to be fixed in a future version of the Intel Quartus Prime Pro Edition Software. Custom Fields values: ['novalue'] Troubleshooting 18020331327 False ['E-tile Hard IP for Ethernet IP'] ['FPGA Dev Tools Quartus® Prime Software Pro'] 22.2 21.3 ['Stratix® 10 FPGAs and SoCs'] ['novalue'] ['novalue'] ['novalue']