Cyclone V Hard IP for PCI Express IP Core - Cyclone V Hard IP for PCI Express IP Core
Description Errors in the Cadence NCSim and ALDEC Riviera-PRO simulators may cause simulation of the Cyclone V Hard IP for PCI Express IP Core to fail. Resolution The workaround is to add the define QUARTUS options to the NCSim or Riviera-PRO vlog command that compiles the arriav_pice_hip_atoms_ncrypt.v file. These options will be added to Altera’s simulation scripts in a future Quartus II Release.
Custom Fields values:
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Troubleshooting
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True
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['FPGA Dev Tools Quartus II Software']
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11.1
['Programmable Logic Devices']
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['novalue'] - 2021-08-25
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