Does the Intel® Stratix® 10 PCIe* Hard IP support Root Port Mode Type 0 TLP Configuration Requests? - Does the Intel® Stratix® 10 PCIe* Hard IP support Root Port Mode Type 0 TLP Configuration Requests? Description The Intel® Arria® 10 PCIe* Hard IP (HIP) supports the Root Port Mode Configuration Requests in which Configuration Type 0 TLPs can be sent into the HIP via the Avalon®-ST TX interface to read/write the HIP's local Configuration Space when it's operating in Root Port mode. However, Type 0 Root Port Mode Configuration Requests capability is NOT supported in the Intel® Stratix® 10 PCIe* HIP operating in Root Port mode. The user is directed to use the HIP Reconfiguration interface to access the local Configuration Space. Resolution The Intel® Stratix® 10 PCIe* Hard IP user guides will be updated to explicitly state that Type 0 Root Port Mode Configuration Requests capability is not supported. Custom Fields values: ['novalue'] Troubleshooting 14010223298 False ['Avalon-MM Stratix® 10 Hard IP for PCI Express', 'Avalon-ST Stratix® 10 Hard IP for PCI Express'] ['FPGA Dev Tools Quartus® Prime Software Pro'] novalue 19.1 ['Stratix® 10 FPGAs and SoCs'] ['novalue'] ['novalue'] ['novalue']