Do the active serial (AS) configuration pins on a Stratix V device tri-state after the device enters user mode? - Do the active serial (AS) configuration pins on a Stratix V device tri-state after the device enters user mode? Description No, the AS configuration pins on a Stratix® V device will not tri-state once the device enters user mode. The AS configuration pins will only be tri-stated when the device is in reset. Resolution To tri-state the AS configuration pins drive nCE high and nCONFIG low. This will hold the FPGA in reset. Custom Fields values: ['novalue'] Troubleshooting novalue False ['novalue'] ['novalue'] novalue novalue ['Stratix® V E FPGA', 'Stratix® V GS FPGA', 'Stratix® V GT FPGA', 'Stratix® V GX FPGA'] ['novalue'] ['novalue'] ['novalue']