Optimize Your Design with LPDDR5 memory using the Agilex™ 5 FPGA D-Series Demo Video - Learn about new External Memory Interfaces (EMIF) IP, configure the LPDDR5 EMIF IP and advanced parameters, and then generate an example design on Agilex™ 5 FPGA D-Series devices. - 2024-10-02
optimize-design-with-lpddr5-memory-using-agilex-5-demo-video.mp4
- Version
- 1.0
- Product Type
- Device Families > Agilex Families > Agilex 5 > D-Series
- Resource Type
- Developer Resources > Videos > Demo Videos
- Source Name
- UD