Agilex™ 5 Ethernet FPGA Hard IP Register Map - This register map describes the Agilex™ 5 GTS Ethernet FPGA Hard IP's configurable register details. It includes both soft CSR (Control and Status Register) and Hard IP registers. - 2026-03-10
Agilex™ 5 Ethernet FPGA Hard IP Register Map.xlsx
- Version
- Current
- Product Type
- Device Families > Agilex Families > Agilex 5 > D-Series
- Device Families > Agilex Families > Agilex 5 > E-Series
- Resource Type
- Source Name
- UD