An Essential Reset for Stratix® 10 & Agilex™ Devices - The Reset Release FPGA IP available in the Quartus Prime Pro software is necessary to use in all Stratix® 10 and Agilex™ devices to hold your design in reset until the FPGAs have finished with the configuration process. In this video, I will go over some of the back ground surrounding the configuration process, design implications of the configuration process, and how to instantiate the Reset Release FPGA IP. - 2021-06-28

Version

1.0

Product Type

Device Families > Agilex Families > Agilex 7

Device Families > Stratix Families > Stratix 10

Device Families > Agilex Families > Agilex 7 > F-Series

Device Families > Agilex Families > Agilex 7 > I-Series

Device Families > Agilex Families > Agilex 7 > M-Series

Resource Type

Developer Resources > Videos > How To Videos

Developer Training > How To Videos

Source Name

UD