F-tile Design Flow - In this video, I will introduce some new F-tile FPGA IP. I will show how to use presets to generate example designs for the IP. I will then use the new Support Logic Generation feature in Quartus® Prime Pro, which is unique to the F-tile, to create simulation models for the example designs. Finally, I will show how to simulate the example designs. - 2021-06-30
f-tile-design-flow.mp4
- Version
- 1.0
- Product Type
- Resource Type
- Developer Resources > Videos > How To Videos
- Developer Training > How To Videos
- Source Name
- UD