Internal Error: Sub-system: SIN, File: /quartus/tsm/sin/sin_micro_tnodes_dag.cpp, Line: 626 - Internal Error: Sub-system: SIN, File: /quartus/tsm/sin/sin_micro_tnodes_dag.cpp, Line: 626 Description This error may be seen in the Quartus® II software version(s) 12.0sp2 and earlier when running the EDA Netlist Writer to create IBIS Models for designs targeting the Arria® V family. This error is triggered if the port list for the top level design file contains differential pin pairs and the negative pin(n) is listed before the positive pin (p) of the same pair. Resolution To work around this problem in the Quartus II Software version 12.0SP2 and earlier, ensure your top level design file lists the positive (p) pin of differential pairs before the negative (n) complement pin. This problem is scheduled to be fixed in a future release of the Quartus II software. Custom Fields values: ['novalue'] Troubleshooting novalue False ['novalue'] ['FPGA Dev Tools Quartus II Software'] novalue 12.0 ['Arria® V GT FPGA', 'Arria® V GX FPGA', 'Arria® V GZ FPGA', 'Arria® V SX FPGA'] ['novalue'] ['novalue'] ['novalue']