RapidIO II IP Core Erroneously Transitions to Output Error Stopped State - RapidIO II IP Core Erroneously Transitions to Output Error Stopped State Description When software writes to the COMMAND field of the Port 0 Link Maintenance Request CSR at offset 0x140 to specify that the outgoing link-request packet has the value input-status in the command field, the IP core output state machine erroneously transitions to the Output Error Stopped state. Resolution This issue has no workaround. This issue is fixed in version 14.1 of the RapidIO II MegaCore function. Custom Fields values: ['novalue'] Troubleshooting novalue True ['novalue'] ['FPGA Dev Tools Quartus II Software'] 14.1 12.1 ['Programmable Logic Devices'] ['novalue'] ['novalue'] ['novalue']