Why does the Fault Injection Debugger fail to read the first injected error after device configuration in Intel® Stratix® 10 devices? - Why does the Fault Injection Debugger fail to read the first injected error after device configuration in Intel® Stratix® 10 devices? Description Due to a problem in Intel® Quartus® Prime Pro Edition version 20.4 and earlier, the Fault Injection Debugger may fail to read the first injected error after device configuration in Intel® Stratix® 10 devices. This problem occurs only when the Advanced SEU Detection Intel® FPGA IP is instantiated in the design. Even when this problem occurs, the SEU_ERROR pin is asserted and the Advanced SEU Detection Intel® FPGA IP still can read the error. Resolution To work around this problem, use the Advanced SEU Detection Intel® FPGA IP to read the first injected error. This problem is fixed starting with the Intel® Quartus® Prime Pro Edition software vertion 21.1. Custom Fields values: ['novalue'] Troubleshooting 1508595707 False ['novalue'] ['FPGA Dev Tools Quartus® Prime Software Pro'] 21.1 20.4 ['Stratix® 10 FPGAs and SoCs'] ['novalue'] ['novalue'] ['novalue']