Why is there a functional error on M20K blocks in Intel Agilex® 7 devices after doing Partial Reconfiguration (PR)? - Why is there a functional error on M20K blocks in Intel Agilex® 7 devices after doing Partial Reconfiguration (PR)? Description Due to a problem in the Intel® Quartus® Prime Pro Edition Software version 22.2 and earlier, you might see a functional error on M20K blocks in Intel Agilex® 7 devices after Partial Reconfiguration (PR) if the base design does not use those M20K blocks. When the problem happens, the failed M20K blocks are stuck, and you cannot read or write to them correctly. You will not see such a functional error on the M20K blocks already used in the base design. This problem can be recovered after doing a full chip reconfiguration. Resolution To fix this problem, download and install the following patch according to your Intel® Quartus® Prime Pro Edition Software version, then regenerate the programming files for both the base and PR images . Intel® Quartus® Prime Pro Edition Software v22.2 - Patch 0.39fw Intel® Quartus® Prime Pro Edition Software v22.1 - Patch 0.40fw Intel® Quartus® Prime Pro Edition Software v21.4 - Patch 0.80fw This problem has been fixed in release 22.3 of Intel® Quartus® Prime Pro Edition Software. Upgrade to the latest device manager firmware for the Intel® Quartus® Prime Pro Edition Software 22.1/22.2/22.3. The latest device manager firmware versions are available from the following link: What is the latest device firmware for Intel Agilex® 7 FPGA and Intel ® Stratix® 10 devices? Custom Fields values: ['novalue'] Troubleshooting 15011390636 False ['novalue'] ['FPGA Dev Tools Quartus® Prime Software Pro'] 22.3 21.4 ['Agilex™ 7 FPGAs and SoCs'] ['novalue'] ['novalue'] ['novalue']