HMC Controller IP Core Example Design Requires a User-Provided External I2C Controller - HMC Controller IP Core Example Design Requires a User-Provided External I2C Controller Description To run the Hybrid Memory Cube Controller IP core example design in hardware, you must provide an external I 2 C controller to communicate with the FPGA and the HMC device. The I 2 C controller provided with the example design does not function correctly with the IP core and the HMC device in hardware. If you compile the Hybrid Memory Cube Controller IP core example design as is, it compiles successfully but issues critical warnings about I 2 C related signals. For example, one of the critical warnings states that the I 2 C pins are not being driven. This issue affects example designs for all Hybrid Memory Cube Controller IP core variations. Resolution This issue is fixed in version 15.1 of the Hybrid Memory Cube Controller IP core. The I 2 C controller provided with the example design functions correctly with the IP core and the HMC device in hardware. Custom Fields values: ['novalue'] Troubleshooting novalue True ['novalue'] ['FPGA Dev Tools Quartus® Prime Software Pro'] 15.1 15.0 ['Programmable Logic Devices'] ['novalue'] ['novalue'] ['novalue']