What is the maximum memory clock frequency for DDR4 in Arria® 10 FPGAs and SoC FPGAs? - What is the maximum memory clock frequency for DDR4 in Arria® 10 FPGAs and SoC FPGAs? Description In Quartus® Prime Pro Edition software version 24.3, users can configure the memory clock frequency to 1333 MHz in the External Memory Interfaces Arria® 10 FPGA IP. However, the External Memory Interfaces Arria 10 FPGA IP User Guide specifies a maximum supported configuration of 1200 MHz. Resolution Users may choose to operate the External Memory Interfaces Arria 10 FPGA IP beyond the published specifications, including overclocking, at their own risk. Custom Fields values: ['novalue'] Troubleshooting QS-9714 novalue ['Memory Controllers'] ['FPGA Dev Tools Quartus® Prime Software Pro'] No plan to fix 24.3 ['Arria® 10 FPGAs and SoCs'] ['novalue'] ['novalue'] ['novalue']