CPRI IP Core v12.0 Autorate Negotiation VHDL Testbench File Requires Modification - CPRI IP Core v12.0 Autorate Negotiation VHDL Testbench File Requires Modification Description The compile_autorate_phy_vhdl.do file that runs the autorate negotiation VHDL testbench for a Stratix V device includes extra lines that prevent the testbench from compiling. Resolution To avoid this issue, in the compile_autorate_phy_vhdl.do file in your CPRI IP core installation, comment out or remove the following lines: vcom -work xcvr_reconfig_cpri ./xcvr_reconfig_cpri_sim/alt_xcvr_reconfig/alt_xcvr_reconfig_cpu.vhd vcom -work xcvr_reconfig_cpri ./xcvr_reconfig_cpri_sim/alt_xcvr_reconfig/alt_xcvr_reconfig_cpu_reconfig_cpu_test_bench.vhd vcom -work xcvr_reconfig_cpri ./xcvr_reconfig_cpri_sim/alt_xcvr_reconfig/alt_xcvr_reconfig_cpu_reconfig_cpu.vhd This issue is fixed in version 12.0 SP1 of the CPRI MegaCore function. Custom Fields values: ['novalue'] Troubleshooting novalue True ['novalue'] ['FPGA Dev Tools Quartus II Software'] 12.0.1 12.0 ['Stratix® V FPGAs'] ['novalue'] ['novalue'] ['novalue']