Why is the Intel Agilex® FPGA QSPI controller disabled during FPGA configuration? - Why is the Intel Agilex® FPGA QSPI controller disabled during FPGA configuration? Description In the Intel® Quartus® Prime Pro Edition Software version 21.1 and prior, there is a problem with the Intel Agilex® FPGA SDM QSPI controller being disabled for the HPS after the initial FPGA configuration occurs during HPS boot first mode. This occurs after the first FPGA configuration from both U-Boot and/or Linux. Resolution To work around this problem, you can re-probe the QSPI flash driver after the initial FPGA configuration. To re-probe in U-Boot, run this commmand: SOCFPGA_AGILEX # sf probe This problem is scheduled to be fixed in a future release of Intel® Quartus® Prime Pro Edition Software. Custom Fields values: ['novalue'] Troubleshooting 22012565848 False ['novalue'] ['FPGA Dev Tools Quartus® Prime Software Pro'] 21.2 21.1 ['Agilex™ 7 FPGA F-Series'] ['novalue'] ['novalue'] ['novalue']