Why does the DDR3 Micron MT41J64M16LA memory preset specify the incorrect data width? - Why does the DDR3 Micron MT41J64M16LA memory preset specify the incorrect data width? Description When you select the Micron MT41J64M16LA -15E memory preset in the DDR3 ALTMEMPHY based controller, the data width is incorrectly specified as 8 bits by default, but in fact, this device is a 16 bit wide device. Resolution You will need to manually change the data width from 8 bits to 16 bits. This issue is fixed in the Quartus® II software version 12.0. Custom Fields values: ['novalue'] Troubleshooting novalue False ['novalue'] ['FPGA Dev Tools Quartus II Software'] 12.0 11.1.2 ['Arria® II GX FPGA'] ['novalue'] ['novalue'] ['novalue']