Internal Error: Sub-system: DYGR, File: /quartus/ddb/dygr/dygr_route_info_singleton_manager.cpp, Line: 343 - Internal Error: Sub-system: DYGR, File: /quartus/ddb/dygr/dygr_route_info_singleton_manager.cpp, Line: 343
Description Due to a problem in the Quartus® Prime Pro Edition Software version 23.4 and earlier, you might see this error when running the Chip Planner and the device settings have been changed after compilation. This problem only affects designs targeting Agilex™ 7 devices. Resolution To work around this problem, recompile the design after changing the device settings. This problem has been fixed with the Quartus® Prime Pro Edition Software version 24.1 and later versions.
Custom Fields values:
['novalue']
Troubleshooting
15014850829
False
['novalue']
['FPGA Dev Tools Quartus® Prime Software Pro']
24.1
23.2
['Agilex™ 7 FPGAs and SoCs']
['novalue']
['novalue']
['novalue'] - 2024-12-05
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