Why does the Intel Agilex® 7 F-Tile device tx_pll_locked signal fail to assert when an R-Tile is included in my design when using the Intel® Quartus® Prime Pro Edition Software version 23.2? - Why does the Intel Agilex® 7 F-Tile device tx_pll_locked signal fail to assert when an R-Tile is included in my design when using the Intel® Quartus® Prime Pro Edition Software version 23.2? Description Due to a problem in the Intel® Quartus® Programmer version 23.2, the Intel Agilex® 7 device F-Tile tx_pll_locked signal fails to assert when an R-Tile is included in your design. Resolution To work around this problem in the Intel® Quartus® Prime Pro Edition Software version 23.2, you can use the Intel® Quartus® software version 23.3 Programmer to configure your Intel® Quartus® Prime Pro Edition Software version 23.2 SOF file into the Intel Agilex® 7 device. This problem is fixed in the Intel® Quartus® Prime Pro Edition Software version 23.3. Custom Fields values: ['novalue'] Troubleshooting 15014770605 False ['novalue'] ['FPGA Dev Tools Quartus® Prime Software Pro'] 23.3 23.2 ['Agilex™ 7 FPGAs and SoCs'] ['Quartus® Prime Pro Edition Programmer and Tools'] ['novalue'] ['novalue']