Why can't I force the parity on the Cyclone® V SoC UART? - Why can't I force the parity on the Cyclone® V SoC UART? Description The Arria® V and Cyclone® V SoC UART do not provide the flexibility to force the parity. Therefore, bit 5 in the UART lcr register documentation is greyed out as reserved. Resolution Intel has no plan to support this feature for the Cyclone V SoC device family but is available on Intel® Arria® 10 FPGAs. Custom Fields values: ['novalue'] Troubleshooting - False ['novalue'] ['FPGA Dev Tools Quartus II Software'] novalue 13.0 ['Arria® V ST FPGA', 'Arria® V SX FPGA', 'Cyclone® V ST FPGA', 'Cyclone® V SX FPGA', 'Arria® 10 SX FPGA'] ['novalue'] ['novalue'] ['novalue']