Can I use the INPUT_TERMINATION .qsf assignment to assign an on-chip termination (OCT) to Transceiver REFCLK or Transceiver IO pins, in Stratix V, Arria V and Cyclone V devices? - Can I use the INPUT_TERMINATION .qsf assignment to assign an on-chip termination (OCT) to Transceiver REFCLK or Transceiver IO pins, in Stratix V, Arria V and Cyclone V devices? Description No you cannot use the INPUT_TERMINATION assignment to assign an on-chip termination (OCT) to transceiver pins on Stratix® V, Arria® V and Cyclone® V devices. Instead, you must use one of the following qsf assignments : XCVR_GT_IO_PIN_TERMINATION (Stratix V GT transceiver IO pins ony) XCVR_IO_PIN_TERMINATION (transceiver IO pins) XCVR_REFCLK_PIN_TERMINATION (REFCLK pins) Refer to the Altera Transceiver PHY IP Core User Guide (PDF) for more information on how to use these assignments. Note that if you use an INPUT_TERMINATION assignment on the transceiver pins, it will be ignored by the Quartus® II software and the default termination option will be assigned to these pins. Related Articles Error (169033): I/O pin with Termination logic option setting Differential cannot be placed inside I/O Bank because the I/O bank does not support the requested Termination setting. Custom Fields values: ['novalue'] Troubleshooting novalue False ['novalue'] ['novalue'] novalue novalue ['Arria® V GT FPGA', 'Arria® V GX FPGA', 'Arria® V GZ FPGA', 'Arria® V ST FPGA', 'Arria® V SX FPGA', 'Cyclone® V GT FPGA', 'Cyclone® V GX FPGA', 'Cyclone® V SX FPGA', 'Stratix® V GS FPGA', 'Stratix® V GT FPGA', 'Stratix® V GX FPGA'] ['novalue'] ['novalue'] ['novalue']