Gen2 Stratix V ES Hard IP for PCI Express IP Core Does Not Train with Gen3 Capable Root Port - Gen2 Stratix V ES Hard IP for PCI Express IP Core Does Not Train with Gen3 Capable Root Port Description The Gen2 Stratix V ES Hard IP for PCI Express IP core does not train properly when interoperating with a Gen3 capable Root Port. Resolution There is no workaround for ES silicon. This issue is fixed in the production version of the Stratix V Hard IP for PCI Express IP core. Custom Fields values: ['novalue'] Troubleshooting novalue False ['novalue'] ['FPGA Dev Tools Quartus II Software'] 12.0 11.1 ['Programmable Logic Devices'] ['novalue'] ['novalue'] ['novalue']