What System PLL frequency do the HDMI TX PHY FPGA IP and HDMI RX PHY FPGA IP require on Agilex™ 7 F-Tile devices? - What System PLL frequency do the HDMI TX PHY FPGA IP and HDMI RX PHY FPGA IP require on Agilex™ 7 F-Tile devices? Description The HDMI TX PHY FPGA IP and HDMI RX PHY FPGA IP require a System PLL frequency of 900MHz on Agilex™ 7 F-Tile devices. Resolution This information will be added to a future edition of the HDMI FPGA IP User Guide. Custom Fields values: ['novalue'] Troubleshooting 18040396489 False ['HDMI'] ['FPGA Dev Tools Quartus® Prime Software Pro'] 25.1 24.2 ['Agilex™ 7 FPGAs and SoCs'] ['novalue'] ['novalue'] ['novalue']