Altera Cyclone V SoC chip overheating - Altera Cyclone V SoC chip overheating I was working on Altera Cyclone V De10 Nano board. Everything seems to be working fine until I manually probed the JP1-GPIO pins to measure the waveform across the pins. After this, the board seemed to behave weirdly. I tried booting the default Xfce image. It got stuck at HDMI Warning: Display not detected HDMI Warning: No Valid Timing Signal found, setting to default 1024*768. The Soc chip also seems to be overheating. I tried measuring the voltages across test points and everything looks good. Is there a chance that my board got faulted? If so, how can I verify it? Thank You Replies: Re: Altera Cyclone V SoC chip overheating Hi Shiva, I recommend you to use deferential prob and to attach the prob first before powering the board without touching any pin by mistake. It seems a user error, The board was working fine until you manually probed some pins then the issue appeared. Please take care while touching any pin while running as some pins are so sensitive (mainly the feedback pin of power devices and some digital pins). Regards. Replies: Re: Altera Cyclone V SoC chip overheating @Embedded_guy, Yes I have perfomance issues with the board. When I boot with the default Xfce image that comes along with the board...The execution stops at HDMI Warning Step and then automatically resets. This keeps on happening again and again. If possible can you explain what would have gone wrong?.. I did not do anything. I just put the default image that came along with the SD Card. Here is the Log of the execution ------------------------------------------------------------------------------------------------------------------------------------------------- U-Boot SPL 2017.03-rc2 (Mar 30 2017 - 19:07:16) /data/de10-nano/release-build-2017.03.31/build/tmp-angstrom-glibc/work/de10_nano -angstrom-linux-gnueabi/u-boot-socfpga/v2017.03+gitAUTOINC+d03450606b-r0/git/dri vers/ddr/altera/sequencer.c: Preparing to start memory calibration /data/de10-nano/release-build-2017.03.31/build/tmp-angstrom-glibc/work/de10_nano -angstrom-linux-gnueabi/u-boot-socfpga/v2017.03+gitAUTOINC+d03450606b-r0/git/dri vers/ddr/altera/sequencer.c: CALIBRATION PASSED /data/de10-nano/release-build-2017.03.31/build/tmp-angstrom-glibc/work/de10_nano -angstrom-linux-gnueabi/u-boot-socfpga/v2017.03+gitAUTOINC+d03450606b-r0/git/dri vers/ddr/altera/sequencer.c: Calibration complete Trying to boot from MMC1 U-Boot 2017.03-rc2 (Mar 30 2017 - 19:07:16 -0700) CPU: Altera SoCFPGA Platform FPGA: Altera Cyclone V, SE/A6 or SX/C6 or ST/D6, version 0x0 BOOT: SD/MMC Internal Transceiver (3.0V) Watchdog enabled I2C: ready DRAM: 1 GiB MMC: dwmmc0@ff704000: 0 *** Warning - bad CRC, using default environment In: serial Out: serial Err: serial Model: Terasic DE10-Nano Net: Error: ethernet@ff702000 address not set. No ethernet found. Hit any key to stop autoboot: 0 reading de10-nano.rbf 3368700 bytes read in 257 ms (12.5 MiB/s) Setting bus to 2 reading STARTUP.BMP 921738 bytes read in 85 ms (10.3 MiB/s) reading de10_nano_hdmi_config.bin 72872 bytes read in 16 ms (4.3 MiB/s) ## Starting application at 0x0C100001 ... HDMI WARNING: No HDMI display detected HDMI WARNING: no valid timing found, setting 1024x768 default U-Boot SPL 2017.03-rc2 (Mar 30 2017 - 19:07:16) /data/de10-nano/release-build-2017.03.31/build/tmp-angstrom-glibc/work/de10_nano-angstrom-linux-gnueabi/u-boot-socfpga/v2017.03+gitAUTOINC+d03450606b-r0/git/drivers/ddr/altera/sequencer.c: Preparing to start memory calibration /data/de10-nano/release-build-2017.03.31/build/tmp-angstrom-glibc/work/de10_nano-angstrom-linux-gnueabi/u-boot-socfpga/v2017.03+gitAUTOINC+d03450606b-r0/git/drivers/ddr/altera/sequencer.c: CALIBRATION PASSED /data/de10-nano/release-build-2017.03.31/build/tmp-angstrom-glibc/work/de10_nano-angstrom-linux-gnueabi/u-boot-socfpga/v2017.03+gitAUTOINC+d03450606b-r0/git/drivers/ddr/altera/sequencer.c: Calibration complete Trying to boot from MMC1 U-Boot 2017.03-rc2 (Mar 30 2017 - 19:07:16 -0700) CPU: Altera SoCFPGA Platform FPGA: Altera Cyclone V, SE/A6 or SX/C6 or ST/D6, version 0x0 BOOT: SD/MMC Internal Transceiver (3.0V) Watchdog enabled I2C: ready DRAM: 1 GiB MMC: dwmmc0@ff704000: 0 *** Warning - bad CRC, using default environment In: serial Out: serial Err: serial Model: Terasic DE10-Nano Net: Error: ethernet@ff702000 address not set. No ethernet found. Hit any key to stop autoboot: 0 reading de10-nano.rbf 3368700 bytes read in 258 ms (12.5 MiB/s) Setting bus to 2 reading STARTUP.BMP 921738 bytes read in 85 ms (10.3 MiB/s) reading de10_nano_hdmi_config.bin 72872 bytes read in 16 ms (4.3 MiB/s) ## Starting application at 0x0C100001 ... HDMI WARNING: No HDMI display detected HDMI WARNING: no valid timing found, setting 1024x768 default ------------------------------------------------------------------------------------------------------------------------------------------------------------------------------ Replies: Re: Altera Cyclone V SoC chip overheating Hi, Having the board warm is normal, let's focus on the performance, Do you have any concern about the performance? If yes, please describe in details. Replies: Re: Altera Cyclone V SoC chip overheating I think it is normal for it to be warm. This is probably one reason why they have the plastic guard on top of it. I have same board, and it is always warm, and it is working just fine.