Why can I not regroup nodes in my auto generated SignalTap II file when using the Create SignalTap II File from Design Instance(s) feature? - Why can I not regroup nodes in my auto generated SignalTap II file when using the Create SignalTap II File from Design Instance(s) feature?
Description Due to a problem in the Quartus® II Software 14.1 and earlier the "group" option is grayed out for nodes in a SignalTap™ II file which has been created for an SignalTap II Logic Analyzer instance through the Create SignalTap II File from Design Instance(s) feature. Resolution This problem is scheduled to be fixed in a future release of the Quartus II software.
Custom Fields values:
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Troubleshooting
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False
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['FPGA Dev Tools Quartus II Software']
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14.0
['Programmable Logic Devices']
['novalue']
['novalue']
['novalue'] - 2021-08-25
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