Introduction to Platform Designer: Building Systems - This instructor-led class is taught in a virtual classroom for 1 half day of instruction. To perform the lab exercises, you will connect to a remote computer provided by Altera® FPGA Training and pre-configured with all the necessary tools. Information required to connect to the remote system will be provided during the class. No setup is needed. The remote computer connection requires you to be logged in from a PC running either Windows* or macOS* operating systems. Course Description This class will teach you the basics of how to build embedded system designs quickly for Altera® FPGA devices using the Platform Designer system-level integration tool, part of the Quartus® Prime software. Platform Designer can be used as a design entry method for any FPGA design, though its use is required if you are implementing a Nios® V processor or the Hard Process System (HPS) in an SoC device. You will become proficient with using Platform Designer and learn how to quickly integrate “off-the-shelf” IP into a system. The class provides a significant hands-on component, where you will have the opportunity to build a system design and see it running in hardware on a Stratix® 10 development kit. Course Objectives At course completion, you will be able to: Build digital systems in the Platform Designer tool Integrate the files generated by Platform Designer into the Quartus Prime software design flow Make use of the extensive IP portfolio available in Platform Designer Skills Required Background in digital logic design Working knowledge of the Quartus Prime software (Lite, Standard, or Pro edition) If you need assistance with this course, please email fpgatraining@altera.com . Reference Course Code: FPGA_IQSYS103. FPGA_IQSYS103. <p>Introduction to Platform Designer: Building Systems</p>