Efficiency Monitor Statistics Incorrect for Initial Sample in DDR2 and DDR3 SDRAM Controller with UniPHY and RLDRAM II Controller with UniPHY - Efficiency Monitor Statistics Incorrect for Initial Sample in DDR2 and DDR3 SDRAM Controller with UniPHY and RLDRAM II Controller with UniPHY
Description The initial statistics produced by the Efficiency Monitor are likely to be incorrect while the interface is calibrating. Resolution The workaround for this issue is to wait for calibration to finish before rereading the statistics from the Efficiency Monitor.
Custom Fields values:
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Troubleshooting
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True
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['FPGA Dev Tools Quartus II Software']
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11.0
['Programmable Logic Devices']
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['novalue']
['novalue'] - 2021-08-25
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