Can I use existing Synopsys Design Compiler (DC) ASIC synthesis scripts for FPGA synthesis in the DC FPGA software? - Can I use existing Synopsys Design Compiler (DC) ASIC synthesis scripts for FPGA synthesis in the DC FPGA software? Description The DC FPGA software accepts Design Compiler Tcl scripts without modification. However, not all Design Compiler constraints are supported or necessary for FPGA synthesis, and these constraints are ignored by the DC FPGA software. For a list of supported constraints, see the Synopsys DC FPGA Support chapter in Volume 1 of the Quartus II Handbook Custom Fields values: ['novalue'] Troubleshooting novalue False ['novalue'] ['novalue'] novalue novalue ['Programmable Logic Devices'] ['novalue'] ['novalue'] ['novalue']