NVMe Streamer 4.0: NVMe IP PCIe Gen4 High-speed Data Streaming - MLE FPGA Design - NVMe is a key protocol for connecting SSDs to high-performance systems, leveraging PCIe for faster read/write speeds. MLE's NVMe Streamer 4.0 is a Full Accelerator NVMe host subsystem optimized for… Intel Agilex® 3 FPGAs and SoC FPGAs C-Series Intel Agilex® 5 FPGAs and SoC FPGAs E-Series Intel Agilex® 7 FPGAs and SoC FPGAs F-Series Intel Agilex® 7 FPGAs and SoC FPGAs I-Series Intel Agilex® 9 FPGAs and SoC FPGAs Direct RF-Series Intel® Stratix® 10 GX FPGA Intel® Stratix® 10 SX SoC FPGA NVMe Streamer is a fully integrated and pre-validated subsystem stack operating the NVMe protocol fully in Programmable Logic (PL) with no software running, keeping the Processing System (PS) out of this performance path. Video and Image Processing Aerospace ASIC Proto Broadcast Data Center Cloud (Public, Private, Hybrid) Defense Government Industrial Medical Test Wireless NVMe Streamer 4.0: NVMe IP PCIe Gen4 High-speed Data Streaming - MLE FPGA Design Key Features Provides one or more NVMe / PCIe host ports for NVMe SSD connectivity Offering Brief No No No No Verilog VHDL Intel Agilex® 3 FPGAs and SoC FPGAs C-Series Intel Agilex® 5 FPGAs and SoC FPGAs E-Series Intel Agilex® 7 FPGAs and SoC FPGAs F-Series Intel Agilex® 7 FPGAs and SoC FPGAs I-Series Intel Agilex® 9 FPGAs and SoC FPGAs Direct RF-Series Intel® Stratix® 10 GX FPGA Intel® Stratix® 10 SX SoC FPGA No No 25.1.1 Offering Brief Development a1JUi000005zsAHMAY What's Included Complete, downloadable NVMe Host and Full Accelerator subsystem integrated into the ERD example system. Ordering Information NVMePL-4 a1JUi000005zsAHMAY Development Intellectual Property (IP) a1MUi00000BO8sfMAD a1MUi00000BO8sfMAD Select 2025-10-27T20:08:59.000+0000 NVMe is a key protocol for connecting SSDs to high-performance systems, leveraging PCIe for faster read/write speeds. MLE's NVMe Streamer 4.0 is a Full Accelerator NVMe host subsystem optimized for Altera Agilex 7 F-/I-Series with F-Tiles and Agilex 5 FPGAs, built on successful customer projects. Running entirely in Programmable Logic, it bypasses the Processing System for maximum performance, using Transceivers and PCIe Hard IP Cores for seamless PCIe connectivity. Partner Solutions