How many clock signals can I assign to each Stratix device digital signal processing (DSP) block? - How many clock signals can I assign to each Stratix device digital signal processing (DSP) block? Description Each Stratix device DSP block has a maximum of four clock signals. These clocks can be used by the input, output, and pipeline registers. The smallest granularity for a multiplier is 9 bits, and therefore it is also the smallest granularity for the registers as well. It is possible that the granularity for the output register is 19 (for a 9 x 9 multiply outlet). Each 9-bit multiplier block can use one of these four clocks. Custom Fields values: ['novalue'] Troubleshooting novalue False ['Basic Functions Clocks (Primary)', 'DSP'] ['novalue'] novalue novalue ['Stratix® FPGAs'] ['novalue'] ['novalue'] ['novalue']