Why is the HPS booting process on Agilex® 5 and Agilex® 3 SoC FPGA devices stuck at the U-boot stage? - Why is the HPS booting process on Agilex® 5 and Agilex® 3 SoC FPGA devices stuck at the U-boot stage? Description Due to a problem in the Agilex® 5 and Agilex® 3 SoC FPGA devices' HPS RAM Repair mechanism sequencing in Quartus® Prime Pro Edition Software version 25.3.1 and earlier, the HPS may fail to boot up normally after a RAM Repair happens. The failure signature is shown in the image below: Resolution To solve the issue, please consider the following options: Upgrade to Quartus® Prime Pro Edition Software 26.1 and newer. Which the fix is included. For Quartus version 25.3.1, apply the Quartus firmware patch attached in this KDB. For older Quartus version, contact Altera to check for the availability of patch. Additional Information Add these notes for the patches for Quartus® Prime Pro Edition Software version 25.3.1 : Patches must be applied to the Quartus® Prime Pro Edition Software and the Quartus® Prime Pro Edition Software Programmer and Tools. Recompilation is not required. All programming files should be recreated. Re-run the programming file generation or conversion using the Quartus® Prime Software programming file generator. Custom Fields values: ['novalue'] Troubleshooting 15019119593 novalue ['novalue'] ['FPGA Dev Tools Quartus® Prime Software Pro'] 26.1 25.3 ['Agilex™ 3 FPGAs and SoCs', 'Agilex™ 5 FPGAs and SoCs'] ['novalue'] ['novalue'] ['novalue']