Why is the F-Tile Ethernet FPGA Hard IP unable to achieve 100% throughput in 400GE-8, 200GE-4 or 50GE-1 variants? - Why is the F-Tile Ethernet FPGA Hard IP unable to achieve 100% throughput in 400GE-8, 200GE-4 or 50GE-1 variants? Description Due to a problem in the Quartus® Prime Pro Edition Software version 23.1, the F-Tile Ethernet FPGA Hard IP 400GE-8, 200GE-4 or 50GE-1 variants can fail to achieve 100% transmit throughput. This problem can occur when the IP has both the Client Interface parameter set to Mac Segmented and the Enable Tx Packing parameter set to Yes . Resolution There is no workaround for this problem. This problem is scheduled to be fixed in version 24.2 of the Quartus® Prime Pro Edition Software. Custom Fields values: ['novalue'] Troubleshooting 16021210764 False ['F-Tile Ethernet Hard IP'] ['FPGA Dev Tools Quartus® Prime Software Pro'] 24.2 23.1 ['Agilex™ 7 FPGAs and SoCs'] ['novalue'] ['novalue'] ['novalue']