Error (21087): Input port "CALCLK" must be driven by the same source - Error (21087): Input port "CALCLK" must be driven by the same source Description You will see this error on Stratix® V, Arria® V, or Cyclone® V transceiver devices if you have more than one reconfiguration controller with different clock sources for the mgmt_clk_clk port if they share a single calibration block. The number of calibration blocks is device dependent. Resolution To work around this problem, use a common mgmt_clk_clk. Custom Fields values: ['novalue'] Troubleshooting novalue False ['novalue'] ['novalue'] novalue novalue ['Arria® V GT FPGA', 'Arria® V GX FPGA', 'Cyclone® V GT FPGA', 'Cyclone® V GX FPGA', 'Stratix® V GS FPGA', 'Stratix® V GT FPGA', 'Stratix® V GX FPGA'] ['novalue'] ['novalue'] ['novalue']