ERROR: iossmwr_cal_bf_cpu_cpu_test_bench/ihp_read is 'x' - ERROR: iossmwr_cal_bf_cpu_cpu_test_bench/ihp_read is 'x'
Description You may see the error message from Questasim*/Modelsim* during simulation when you instantiate the Agilex™ 7 FPGA M-Series DDR5 EMIF IP in your design. Resolution Workaround is to use the set USER_DEFINED_COMPILE_OPTIONS "-O0" option to compile the design.
Custom Fields values:
['novalue']
Troubleshooting
15017737714
False
['EMIF Memory Device Description IP (DDR5)']
['FPGA Dev Tools Quartus® Prime Software Pro']
25.3
25.1
['Agilex™ 7 FPGA M-Series']
['novalue']
['novalue']
['novalue'] - 2025-09-04
external_document