subtractor in quartus - subtractor in quartus Hello All, I am new to Altera and I am using Agilex to do some interesting stuff. Does any one know whether Quartus Prime 20.4 have ip core to do subtraction with embedded pipelines? I only see Multiply Adder Intel FPGA IP core inside it. What is the best way to do subtraction? Shall I write it in verilog explictly? Replies: Re: subtractor in quartus Hi, Do you have any further update or concern? Thanks, Regards, Sheng Replies: Re: subtractor in quartus Hi, you can use Fixed Point Functions IP, Parrallel Add. Substraction is generated by giving a minus sign to one input parameter. It has all options to set different pipeline levels and estimates speed. Replies: Re: subtractor in quartus That +/- is only for DSP. But I prefer to use ALMs. So I am curious if we can use any IPs to do substraction using ALMs as a pipelined fashion? Replies: Re: subtractor in quartus Hi, did you notice the "+/-" symbol in DSP block schematic? Fixed and float IP perform both add and substract.