Do the data and the source clock both need to be present at the inputs for the dynamic phase alignment (DPA) circuitry to operate correctly in Stratix GX devices? - Do the data and the source clock both need to be present at the inputs for the dynamic phase alignment (DPA) circuitry to operate correctly in Stratix GX devices? Description Yes, both the data and the source clock must be present for the DPA circuitry to operate correctly. Custom Fields values: ['novalue'] Troubleshooting novalue False ['Basic Functions Clocks (Primary)'] ['novalue'] novalue novalue ['Programmable Logic Devices', 'Stratix® GX FPGA'] ['novalue'] ['novalue'] ['novalue']