Experience the Performance of Quartus® Prime Pro 24.3 and Agilex™ 5 FPGAs D-Series - Experience the Performance of Quartus® Prime Pro 24.3 and Agilex™ 5 FPGAs D-Series Quartus Prime Pro release 24.3 has powerful features and enhancements that empower FPGA developers with industry-leading compile times, improved designer productivity, and accelerated time-to-market. In this release, we’re excited to introduce support for Agilex 5 FPGAs D-Series , enhanced embedded software development capabilities, and significant improvements to the Quartus Exploration Dashboard. Let's dive into what’s new! New Device Support: Agilex 5 FPGA D-Series devices and More With this new software release , Altera continues expand ing its FPGA portfolio by support ing the new Agilex 5 D-Series variant devices. The Agilex 5 D-Series represents a leap in performance, size, and power optimization, catering to various applications, especially DSP-heavy AI applications, embedded systems, and edge computing. This release also brings updated support for Agilex 5 E-Series and Agilex 7 devices. Alongside device support, the new release introduces a comprehensive suite of I ntel lectual P roperty cores (IP) support designed for the Agilex 5 D-Series. This includes: Video and Vision Processing : Using the Video and Vision Processing (VVP) Suite with Agilex 5 FPGAs provides robust capabilities for AI-driven computer vision, low-latency video analytics, and real-time object detection, making it ideal for edge computing, automotive, and industrial applications that require high-quality video and vision processing. The MIPI D-PHY and the MIPI CSI-2 interface support up to 3.5G on Agilex 5 FPGAs, enabling efficient high-performance video data transmission. Also, th e VVP Textbox IP is introduced for real-time adjustments in visual data processing. Compute Interconnect : PCI Express 4.0 x8 protocol stack with VirtIO and SR-IOV for high-performance computing . Network Interconnect : 28G transceivers and 10G Ethernet with TSE for efficient, real-time communicati on Ethernet Multi-Rate PHY IP support up to 10G, and low-latency Triple Speed Ethernet (TSE) support with LVDS interface . External Memory Interface : Support DDR4/5 and LPDDR4/5 memory for fast data processing. Communications Interconnect : JESD204B/C for high-speed data conversion up to 17G CPRI and eCPRI with MAC capability supporting up to 10G, enhancing communication efficiency. Additionally, engineers can use no-cost licensing options for various IP s , including the versatile Nios ® V soft processor and MIPI CSI-2 . Quartus Prime Pro 24.3 introduces auto-fetching capabilities , making it more straightforward to get started with your Agilex 5 designs. Enhanced Embedded Software Development We’ve introduce d new features aimed at simplifying and accelerating embedded software development. Development processes can be streamlined w ith new embedded software libraries and Board Support Packages (BSP) tailored for Agilex 5 devices . Developers can now access a range of operating systems enabled by Altera, including Linux, Zephyr RTOS, and Bare Metal. Operating systems included by our ecosystem partners include VxWorks and FreeRTOS, providing greater flexibility in building robust, high-performance embedded applications. Key enhancements to Altera’s RISC-V solution, the Nios V/g general-purpose processor , include branch prediction, lockstep support, and ECC support, optimiz ing embedded systems’ performance and reliability . Combined with Golden Hardware and Software Reference Designs available on GitHub and Rocketboards.org, Quartus Prime Pro 24.3 provides a comprehensive toolkit for embedded design, empowering developers to bring their innovations to life more efficiently. Exploring Design Possibilities with the Enhanced Quartus Exploration Dashboard Another highlight of the 24.3 release is the improved Quartus Exploration Dashboard (QED). This powerful tool has been further refined to allow for fast er and more flexible exploration of multiple compilation configurations. The enhancements to QED in this release enable users to efficiently fine-tune their designs, optimizing for performance, power, and area. Moreover, Quartus Prime Pro 24.3 introduces machine-learning-based estimation of post-synthesis area used , giving designers a clearer picture of resource utilization early in the design process. This improvement and updates to the Node Finder and Interface Planner allow for a more efficient design experience, ensuring developers can achieve optimal results with fewer iterations and reduced compile times. Additional 24.3 h ighlights : Cycle-Accurate Models for NoC Simulation : Developers working with HBM interfaces can now utilize cycle-accurate models for NoC simulation for more precise performance analysis. Pre-Compiled Simulation Libraries : P re-compiled components with pre-compiled simulation libraries reduc e compile time s and accelerat e design workflows. Advanced Link Analyzer Updates : Enhanced support for F-Tile FHT and FGT transceivers and a more robust simulation engine streamline link analysis for high-speed communication applications. Beta Docker Container Support : E xtend ed Docker container support provi des a more flexible and consistent development environment. This streamline s software deployment and improve s collaboration across different computing environments. Get Started with Quartus Prime Pro 24.3 Today! Quartus Prime Pro release 24.3 is a game-changer in FPGA design, delivering powerful tools and capabilities tailored to the latest Agilex devices and embedded development needs. With its enhanced embedded software development features, expanded device support, and advanced exploration tools, engineers and designers are empower ed to innovate like never before. Download Quartus Prime Pro 24.3 today and explore the limitless possibilities it offers. Visit the Quartus Prime Pro website to learn more. What's New in the Quartus®Prime Design Software Agilex™ 5 FPGA and SoC FPGA Design Hub Agilex™ 5 FPGA and SoC FPGA Videos