Why are my NoC group, bandwidth, and transaction size assignments not visible in the NoC Assignment Editor? - Why are my NoC group, bandwidth, and transaction size assignments not visible in the NoC Assignment Editor? Description Due to a problem in the Intel® Quartus® Prime Pro Edition Software version 23.3, you might see that NoC group, bandwidth, and transaction size assignments are not visible in the NoC Assignment Editor in the following scenario: You created an example design for the High Bandwidth Memory (HBM2E) Interface Intel Agilex® 7 FPGA IP or External Memory Interfaces (EMIF) IP in an Intel Agilex® 7 M-series FPGA. You modified your project to create a new top-level, which instantiates two instances of this example design. The project’s Quartus Settings File (.qsf) retains NoC group, bandwidth, or transaction size assignments from the original example design, including any -entity arguments for these assignments. In this scenario, you might also see this internal error during synthesis: Internal Error: Sub-system: HDB, File: /quartus/db/hdb/hdb_entity_wildcard_expander.cpp, Line: 846 Resolution To work around this issue, edit the .qsf to remove all NOC_GROUP, NOC_READ_BANDWIDTH, NOC_WRITE_BANDWIDTH, NOC_READ_TRANSACTION_SIZE, and NOC_WRITE_TRANSACTION_SIZE assignments with the argument “-entity ed_synth”. Custom Fields values: ['novalue'] Troubleshooting 14020461921 14020230960 False ['novalue'] ['FPGA Dev Tools Quartus® Prime Software Pro'] novalue 23.3 ['Agilex™ 7 FPGA M-Series'] ['novalue'] ['novalue'] ['novalue']