How do I infer the pre-adder in the Variable Precision DSP Block of a Cyclone V device? - How do I infer the pre-adder in the Variable Precision DSP Block of a Cyclone V device? Description To infer the pre-adder in the Variable Precision DSP Block of the Arria® V, Cyclone® V, and Stratix® V device families be sure to resize your data inputs to the pre-adder by an additional bit to account for the carry within the pre-adder function. Resolution To see an example of what this might look like use the Quartus II software templates available from the Edit > Insert Template... > VHDL > Full Designs > Arithmetic > DSP Features (Stratix-V, Arria-V and Cyclone-V). Select one of the multiplier templates with operands from the pre-adder, for example Multiplier with One Operand from Pre-Adder template. These same templates are also available via the Verilog templates. Custom Fields values: ['novalue'] Troubleshooting novalue False ['novalue'] ['novalue'] novalue novalue ['Arria® V GT FPGA', 'Arria® V GX FPGA', 'Arria® V GZ FPGA', 'Cyclone® V GT FPGA', 'Cyclone® V GX FPGA', 'Stratix® V E FPGA', 'Stratix® V GS FPGA', 'Stratix® V GT FPGA', 'Stratix® V GX FPGA'] ['novalue'] ['novalue'] ['novalue']