Error(13224): Verilog HDL or VHDL error at altera_pcie_s10_hptxs_tx.sv(<your line number>): index <your index> is out of range [<your range>] for address - Error(13224): Verilog HDL or VHDL error at altera_pcie_s10_hptxs_tx.sv(<your line number>): index <your index> is out of range [<your range>] for address Description Due to a problem in the Intel® Quartus® Prime Pro Edition Software version 17.1 and earlier, you will see this error with the Avalon®-MM Stratix® 10 Hard IP for PCI Express* if you do the following: Select "Enable high-performance bursting Avalon-MM slave interface (HPTXS)" And select "Enable mapping (HPTXS)" AND select one of the first two choices 1 page - 0 bits 2 pages - 1 bit Resolution To work around this issue, choose one of the remaining 8-page mapping selections. This problem is fixed starting with the Intel® Quartus® Prime Pro Edition Software version 17.1.1. Custom Fields values: ['novalue'] Troubleshooting FB: 501310; True ['Avalon-MM Stratix® 10 Hard IP for PCI Express'] ['FPGA Dev Tools Quartus® Prime Software Pro'] 17.1.1 17.1 ['Stratix® 10 FPGAs and SoCs'] ['novalue'] ['novalue'] ['novalue']