How do I enable the SignalTap II logic analyzer when compiling my project using the command line? - How do I enable the SignalTap II logic analyzer when compiling my project using the command line? Description To compile your project with the SignalTap™ II Logic Analyzer from the command line, first run the following command: quartus_stp <project> --stp_file <file>.stp --enable This command will take the information from your SignalTap II file ( .stp ) and add it into the Quartus II Settings File ( .qsf ). Then compile your project as normal. For example, if you run a script that calls each process, add quartus_stp as the first line quartus_stp <project_name> --stp_file <file>.stp --enable quartus_map quartus_cdb --merge quartus_fit quartus_sta quaruts_asm If you compile your project using the single line --flow method, ( quartus_sh --flow compile <project_name> ), add the quartus_stp call before it. To remove the SignalTap II logic analyzer from your project, use the --disable switch. quartus_stp <project_name> --stp_file <file>.stp --disable Related Articles Why are there SignalTap II Logic Analyzer assignments in my .qsf? Custom Fields values: ['novalue'] Troubleshooting novalue False ['novalue'] ['novalue'] novalue novalue ['Programmable Logic Devices'] ['novalue'] ['novalue'] ['novalue']